Sunday, May 3, 2015

Open Compute Project, CanSecWest and new specifications from the UEFI Forum

"The goal in technical writing is not to be possible to understand, but to be hard to misunderstand."- Cook

"Writing is nature's way of letting you know how sloppy your thinking is." - Guidon

Background
This blog is probably disappointing Cook and affirming Guidon's wisdom at the same time.

The danger of delaying posting a blog is catching up with recent events. As such, I have a bit of content to soldier through in this posting. The most exciting of late is the posting of the UEFI 2.5, PI 1.4, and ACPI 6.0 specifications http://www.uefi.org/specifications, but the preceding events definitely argued for much of the content and motivation which has appeared in those specifications.

I was on the road for a few weeks in March and April. First I attended the Open Compute Project (OCP) Summer 2015 summit http://www.opencompute.org/community/events/summit/ocp-us-summit-2015/ in sunny San Jose.

After that I sojourned north to attend the CanSecWest (CSW) conference in less-than-sunny Vancouver, B.C., Canada.

Although OCP treated opening up the designs of servers, and CSW was an information security conference, there were some common threads, such as openness, firmware, UEFI,....

And speaking of openness, I finished the tour in southern Washington State at the Open Source Technology Summit (OSTS).

OCP
To begin, the Open Compute Project http://www.opencompute.org/ hosts a community where common elements to build out the data center, such as network switch, server board schematics, rack mechanicals, etc can be shared.


Many companies are involved in OCP, with a recent discussion of resultant hardware at http://www.anandtech.com/show/9138/open-compute-hardware-tried-and-tested.

The keynote videos and presentations can be found at http://www.opencompute.org/blog/ocp-u.s.-summit-2015-video-and-presentation-links/.

OCP has made a lot of progress on opening up board designs, chassis specs, etc over the last few years.  But aligning on firmware hasn’t been a first priority.  I chatted w/ one company VP and his engineer afterward.  The quote from engineer was “firmware is our biggest head-ache, it should have been the first focus area of OCP.” This is because of requirements around device update, boot policy, and other aspects of a system that read directly on host boot firmware.

Mallik Bulusu from Microsoft and I https://www.flickr.com/photos/106659057@N08/16966691206/in/set-72157651601950765 spoke about some of the problem statements and opportunities in the cloud.  Material presented can be found at:



This paper also treats briefly on the topic of open source support for these technologies and possibly entire server platforms.

Regrettably, the talk preceded the release of UEFI 2.5, ACPI6.0, and PI1.4, so we were not able to discuss some of that material as it was under UEFI Confidentiality at the time. We mentioned the firmware-related Cloud problem statements, such as scalable configuration and network provisioning. The latter, namely the boot-from-HTTP work defined in UEFI 2.5 via wire protocols, DHCP extensions, and new API's for HTTP, TLS, and DNS, will be touched upon later in this blog posting.

This talk seemed well-received, with some nice social media responses, too
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Speaking of Curt Brune above, his company Cumulus announced a usage of ACPI http://www.enterprisenetworkingplanet.com/netsp/cumulus-networks-introduces-the-acpi-platform-description-apd.html for network switches. Essentially the effort entails making the switch look like a server for purposes of running general purpose OS’s.  That’s another trend that is auspicious for the UEFI Forum-based technology and Intel as a component supplier to the switch hardware as a more open platform.

Beyond accretion of new functional technology in the UEFI Forum specification corpus, there were discussions of open source from http://www.rackspace.com/ in the context of their Power8 support. Specifically, from
"The parts that Rackspace is changing are inside the server and will take advantage of all of the firmware and systems software work that Rackspace has done already with X86-based systems and will also leverage the open firmware that IBM and Google have created for Power8 systems, which weighs in at around 420,000 lines of code."

Facebook also had a session on open sourcing their BMC with Yocto Linux, and discussions around mini-BMC's and FreeRTOS were also in the air.

So the addition of consistency of interfaces, in addition to more openness in the development model were described.

Open source is a prevailing theme of this blog, and I was chided by some in the open source community that firmware should be one of these things:

1- either perfect at inception
or
2- give people the source to do themselves
or
3- remove from pre-OS altogether

I argue that no software is perfect, but a community can strive to patch software, #1 can become 'imperfect but will patch." This is a place where UEFI2.5, ESRT, and capsules can help.

On #2, there are challenges with technology like hardware-verified boot, where 'protecting the user' and 'allowing innovation' have some interesting tension.  NIST 800-147 reads on allowing for physically present users to bypass protections, and Chromebooks have both developer mode and the write-protect screw, so I believe that you can balance the end-user protection and choice dialectic.

Finally, on #3 maybe there is a path forward? For client systems that boot in non-human perceptible time, maybe deferring things like graphics initialization into the operating system and omitting from the pre-OS could be a future-looking option?

CSW
Next, I embarked on a road trip from Seattle to Vancouver, BC, to attend CanSecWest https://cansecwest.com/agenda.html


As shown in the agenda, the Friday sessions led off with three offence talks and one defender talk, namely mine.  Throughout the sessions Dragos reiterated "The BIOS vulnerability beatings will continue until morale improves." https://twitter.com/dragosr/status/578988308853698560

My talk, now posted at https://cansecwest.com/slides/2015/UEFI%20open%20platforms_Vincent.pptx was intended to provide an alternative perspective on the firmware ecosystem. I led off with a summary of the history of boot firmware, the present standards and open source activities, and detailed a list of the salient open source collateral and platforms.

The one slide that most resonated with the crowd detailed the difference between the open source trunk, with fixes on http://www.tianocore.org/security/ and the resultant product trees on shipping platforms.



This is again where UEFI 2.5 and capsule updates, ESRT, and OS support across the Linux upstreams, disributions, and Windows comes into play.

Luckily I had the opportunity to speak to David Aucsmith ahead of my session, and he mentioned that a review of UEFI Secure Boot as a "Ceremony" was an appropriate lens to apply https://eprint.iacr.org/2007/399.pdf.


Carl Ellison http://world.std.com/~cme/ was a great mentor http://www.google.com/patents/US7328340 of mine during his time at Intel. Methodologies like Ceremonies remind us that the security of a system is rarely just in the mechanics of the cryptography, but instead spans the human and organizational actors. In the case of UEFI Secure Boot this includes the ecosystem, manufacturing-time provisioning, end user and enterprise management, etc. All of these flows need to be considered for purposes of system assurance.

Speaking of mentors, happy to see http://www.google.com/patents/US9015455 issued with Jim Held http://newsroom.intel.com/community/intel_newsroom/bios?n=James%20P.%20Held&f=searchAll, too.

SUSE's pioneering work on MOK https://www.suse.com/communities/conversations/uefi-secure-boot-details/ is a great example of a broader view of the solution space and required technology. Additional details on SUSE's work was also discussed at http://intelstudios.edgesuite.net/idf/2013/sf/aep/STTS002/STTS002.html.

I also had the opportunity to meet with the USB Armory http://www.inversepath.com/usbarmory.html team. They described how ARM TrustZone (TZ), although an architectural CPU mode, has configuration issues. Specifically, each SOC vendor does the configuration differently of ranges reserved for TZ. I smiled since this is similar to some of the malaise around System Management Mode (SMM) on IA32/x64, namely a consistent set of CPU behaviors but different SOC/CPU/chipset configuration techniques per product families.

The final aspect of the talk included threat modeling and open platforms. On the former, I reminded the audience of the threat modeling that motivates today's UEFI features and some future looking opportunities on protection. I also reviewed the Quark and Minnowboard MAX platforms, with their fully and partially open source UEFI EDK II implementations, respectively, as great opportunities to collaborate. On the topic of the MAX I elaborated recently on some of these sentiments at http://firmware.intel.com/blog/security-technologies-and-minnowboard-max.

Although it was tough to follow several hours of attack talks on UEFI, I felt it important to show up at CSW for several reasons. I wanted to show that the UEFI community was engaged, concerned and results-oriented in the face of these issues afflicting the platform. And I also wanted to reach out to the researchers on how we can work together to make the platforms, and thus the internet, a safer place for all of us.

Beyond this talk, we also posted some material on how to defend a EDK II-based platform during boot http://firmware.intel.com/sites/default/files/resources/A_Tour_Beyond_BIOS_Using_Intel_VT-d_for_DMA_Protection.pdf.

The UEFI Forum has posted the revocation list, or DBX for UEFI Secure Boot, at http://uefi.org/revocationlistfile.

OSTS
My final stop has been the Open Source Technology Summit (OSTS), an Intel-hosted event in Skamania, WA. You can find some mention with the Twitter hash-tag #osts2015.

https://www.flickr.com/photos/davest/3339316813/in/photostream/ provides one view of the surroundings.

This final talk folded in some of the open source trends touched upon at OCP and CSW, and added some color on other community evolution.


I was jovial at the beginning, at least.


At this point I was fielding questions on secure boot, and I see that Linus in the audience has a grin.

Speaking of open source, another notable event since the last posting has been the release of the coreboot payload on http://www.tianocore.org. I mentioned this technology in http://firmware.intel.com/blog/edkii-fsp-and-other-topics and have some content in http://www.apress.com/9781484200711, but the code's now live at https://github.com/tianocore/edk2/tree/master/CorebootPayloadPkg and  https://github.com/tianocore/edk2/tree/master/CorebootModulePkg with a wiki at https://github.com/tianocore/tianocore.github.io/wiki/Coreboot_UEFI_payload.

Interesting community response after the posting included:

Patrick Georgi

Shared publicly  -  Mar 31, 2015

coreboot support in Tianocore (so Tiano acts as coreboot payload, providing UEFI services to the OS), committed by Intel employees.

I'm not sure I would have believed this 4 years ago.



Specifications
Although I cannot hope to do this topic justice tonight, I'd like to elaborate on
PI1.4 spec http://www.uefi.org/sites/default/files/resources/PI_release_1_4.zip,
ACPI6.0 http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf, and
UEFI2.5 http://www.uefi.org/sites/default/files/resources/UEFI%202_5.pdf,
as described in the press release http://www.uefi.org/node/897.

On the back of the PI1.4 release, the Intel Firmware Support Package (FSP) 1.1 release has also been made
http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf. The latter leverages some of PI1.4, such as the graphics HOB definition. We also published a couple of papers on the creation / production of a FSP http://firmware.intel.com/sites/default/files/resources/A_Tour_Beyond_BIOS_Creating_the_Intel_Firmware_Support_Package_Version_1_1_with_the_EFI_Developer_Kit_II.pdf and consumption / integration / usage http://firmware.intel.com/sites/default/files/resources/A_Tour_Beyond_BIOS_Using_the_Intel_Firmware_Support_Package_Version_1_1_with_the_EFI_Developer_Kit_II.pdf, respectively.

These specifications tie into the above talks via a few threads. One thread is the need to evolve UEFI technology for the cloud, and to that end the boot-from-HTTP portion of the UEFI 2.5 specification squarely targets this space. Below shows schematically model of booting wherein TFTP (and thus UDP) based PXE can move to HTTP (and thus TCP) based booting. The move to a connection oriented protocol removes some of the chronic data center complaints, such as time-outs in "booting the Skynet" http://en.wikipedia.org/wiki/Skynet_%28Terminator%29, or more formally, provisioning warehouse-scale computers http://research.google.com/pubs/pub35290.html.




In addition to the wire protocols and DHCP extensions, additional API's for the network boot program were created, such as HTTP, DNS, and TLS. The latter allows for an optional boot-from-HTTP-s flow. This solution also allows for in-band and out-of-band RESTful messaging, such as http://www.redfishspecification.org/. Although many data centers use dark fibre and don't have threat models beyond the integrity concerns mitigated by UEFI Secure Boot, TLS allows for confidentiality cover where deemed necessary.



And TLS comes more into play in order to support another scenario enabled by the UEFI 2.5 specification, namely boot-from-wifi.  Wi-Fi security requires a supplicant, which is typically EAP-TLS support. So the UEFI 2.5 specification updated EAP to work on concert with TLS for the WI-FI use case. Some of the WI-FI support is shown below.

In addition to WIFI, Bluetooth support was also added to the UEFI 2.5 specification. This allows for building IOT-style usages in UEFI, but more importantly works in tandem with WIFI above for the no-wires style usages found in today's phone, tablets, and slim laptops. Without this wireless evolution, UEFI and its wired networking support was becoming more of a server/datacenter technology and missing some of the prevailing client trends.



In order to support boot-from-HTTP, and other firmware network boot art, such as U-Boot, the
http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml list has also evolved since the last blog posting.

Processor Architecture Types

Registration Procedure(s)
Expert Review
Expert(s)
Vincent Zimmer
Reference
[RFC5970]
Available Formats

CSV
Type Architecture Name Reference 
0x00 0x00x86 BIOS[RFC5970][RFC4578]
0x00 0x01NEC/PC98 (DEPRECATED)[RFC5970][RFC4578]
0x00 0x02Itanium[RFC5970][RFC4578]
0x00 0x03DEC Alpha (DEPRECATED)[RFC5970][RFC4578]
0x00 0x04Arc x86 (DEPRECATED)[RFC5970][RFC4578]
0x00 0x05Intel Lean Client (DEPRECATED)[RFC5970][RFC4578]
0x00 0x06x86 UEFI[RFC5970][RFC4578]
0x00 0x07x64 UEFI[RFC5970][RFC4578]
0x00 0x08EFI Xscale (DEPRECATED)[RFC5970][RFC4578]
0x00 0x09EBC[RFC5970][RFC4578]
0x00 0x0aARM 32-bit UEFI[RFC5970]
0x00 0x0bARM 64-bit UEFI[RFC5970]
0x00 0x0cPowerPC Open Firmware[Thomas_Huth]
0x00 0x0dPowerPC ePAPR[Thomas_Huth]
0x00 0x0ePOWER OPAL v3[Jeremy_Kerr]
0x00 0x0fx86 uefi boot from http[Samer_El-Haj-Mahmoud]
0x00 0x10x64 uefi boot from http[Samer_El-Haj-Mahmoud]
0x00 0x11ebc boot from http[Samer_El-Haj-Mahmoud]
0x00 0x12arm uefi 32 boot from http[Samer_El-Haj-Mahmoud]
0x00 0x13arm uefi 64 boot from http[Samer_El-Haj-Mahmoud]
0x00 0x14pc/at bios boot from http[Samer_El-Haj-Mahmoud]
0x00 0x15arm 32 uboot[Joseph_Shifflett]
0x00 0x16arm 64 uboot[Joseph_Shifflett]
0x00 0x17arm uboot 32 boot from http[Joseph_Shifflett]
0x00 0x18arm uboot 64 boot from http[Joseph_Shifflett]
0x00 0x19-0xff 0xffUnassigned

In addition to boot-from-HTTP, DNS, TLS, wireless, Bluetooth, UEFI 2.5 also added REST support. REST can be built upon the new HTTP API for in-band networking usages, such as https://www.redfishspecification.org/, or via out-of-band to a baseboard management controller (BMC), with the new BMC device path providing identity.

As the chair of the UEFI Networking Sub-Team (UNST) and the UEFI Security Sub-Team (USST), I am proud of the work that the team members did the create this collateral.

And this is just a taste. USST also produced interfaces for inline cryptographic interface (ICI) hardware, smart cards, enterprise deployment of UEFI Secure boot, additional protection capabilities of the boot, stylized operating system and platform recovery, among the various additions. I am working with the subteams to provide rationale documents in order to let the world into the insights and deliberations that gave birth to these new technologies. In no way can a blog like this hope to scratch the surface on the topic areas.

Upcoming talks

Next stop of the talking tour is a bit easier for me. I only need to wander to the nearby UEFI Plugfest in Seattle to speak about "Addressing Firmware Challenges for the Cloud with UEFI" in mid-May http://www.uefi.org/node/887. This is a variant of the OCP talk above that will include insights and matter that is now public in the UEFI 2.5, ACPI 6.0, and PI1.4 specifications.

And then it's off to San Francisco to share a panel talk at the Design Automation Conference (DAC)
http://www2.dac.com/events/eventdetails.aspx?id=182-18 on hardware versus software security.

TUESDAY June 09, 1:30pm - 3:00pm | Room 300 
TRACK: SECURITY
TOPIC AREA: SECURITY

SESSION 18
PANEL: Design for Hardware Security: Can You Make Cents of It?
Moderator:

Saverio Fazzari - Defense Advanced Research Projects Agency, Washington, DC

Organizer:
 Saverio Fazzari

Given the proliferation of counterfeit electronics in the supply chain, recent breaches at major retailers and the ever-growing Internet of Things, there is evidence that electronic hardware is the "new frontier" for security compromise.  Yet the protection of hardware continues to take a back seat to software in cyber-defense. How real is the problem of hardware security?  Should there be a stronger push to develop and deploy security techniques in design? Finally, is there money to be made in hardware security? Who benefits and who pays?  



Panelists:

Ingrid Verbauwhede - Katholieke Univ. Leuven, Belgium
Siva G. Narendra - Tyfone, Inc., OR
Vincent Zimmer - Intel Corp., Seattle, WA
Dino A. DaiZovi - New York Univ., New York, NY
Lisa McIlrath - Raytheon BBN Technologies, Cambridge, MA

I'm glad to see "Intel Corp, Seattle, WA" next to my name. I'm hoping to put more of the Intel-in-the-Emerald-City visibility out in the community.

On the latter topic of "Hardware Security", as the 'firmware guy' it's always interesting to see which side of the fence I most straddle (psst - I still say 'software').


Tuesday, February 24, 2015

Anniversary .next ^3 and 3 behaviors

Today marks eighteen years in my Intel journey, so I am keeping up the tradition of writing a blog entry on this day, as started with http://vzimmer.blogspot.com/2012/02/anniversary-day.html. The title exponentiates '.next' versus '.next.next.next'-style usage. This makes me eligible for a half-sabbatical, too. Since the last posting I've firmly moved into the new Seattle office. Below is a picture of the facility from across the street. It is located in south Seattle, adjacent to the International District.


I managed to get a cube-with-view, too.


The view also affords me a vantage in case of an invasion https://twitter.com/vincentzimmer/status/565562482383527936



So with a new office and work anniversary afoot, I will continue my blogging tradition. I'll begin with a few thoughts on being an engaged engineer. These sentiments include:

1. Being present

Even before chancing across http://www.forbes.com/sites/ellevate/2015/02/20/why-face-to-face-meetings-are-so-important/ this evening, I have always believed in face-to-face engagements in the workplace. Although I've always worked at a remote site, namely WA-state Intel, I purposely go out of my way to visit the larger sites, such as Intel in Hillsboro, OR, or the headquarters in Santa Clara.

It's imperative to have such meetings early in an engagement so as to build rapport, and then possibly maintain the relationship remotely for subsequent collaboration. Showing up demonstrates that 'you care' and that the other person 'matters.' Nothing can substitute for these gestures.

Also, having badged into five Intel sites across three states during the preceding four-day-week  using plane, train, and automobile, I have recently practiced what I'm preaching on this topic.

2. Saying you don't know

A colleague in Oregon last Thursday suggested I treat this topic, although I've opined on it before. So here goes.

Another behavior I've observed includes reluctance of many technical leader to say "I don't know." Not having the immediate answer is OK. Just commit to following up and supporting the party. Feigning understanding doesn't help your standing with the other party or the overall business goals.

The technology and business landscape changes constantly. Strictly speaking it's impossible 'to know' everything.' But it is possible to keep and open mind, customer-oriented disposition, and desire to 'learn.'  Let an occasional 'I don't know' help fuel the fire of curiosity and pedagogy.

I've touched on the former two items in past blogs, but I have yet to treat the next topic.

3, Ownership

In general, ownership can be powerful in that it highlights the party culpable for furthering a business or technical agenda. Recently, though, I've seen the dark side of ownership. For example, in some discussions people will assert "I own that." This is a variant of the logical fallacy of argument from authority in that the act of ownership is posited in lieu of providing other data, such as results.

Instead of 'ownership', I am more of a fan of 'helping lead,' 'coordinate', 'drive'. What matters is the business result. None of us truly 'own' anything in the company. The upper management, and reductio ad absurdum, the stockholders, 'own' the company. We are entrusted as employees, and especially as technical leaders, to drive a goal.

On the flight Friday morning, a senior manager gave me a nice definition of a leader. Minimally, a leader must 'have followers' and 'make changes.' I'd say that's necessary but not sufficient. Sufficiency may include a qualification of change such that it is 'conducive to the growth of the business,' and followers who 'grow and advance in their careers' as a result of the interaction. Good stuff.

So next time I hear "I own X," I'd rather hear "This is what we've produced with X."

So speaking of X's, let's talk about security and open source.

On the security front, I don't want to say too much other than note that I'll be speaking at CanSecWest (CSW) next month https://cansecwest.com/post/2015-02-01-11:00:00_Speaker_Announcements. The title of my talk, "UEFI, Open Platforms, and the Defender's Dilemma", sums up my thoughts on platform security.

To begin, let's dissect the title. The first portion of the title UEFI provides mechanism, such as many of the technologies found on http://www.tianocore.org and also recent write-up's like http://firmware.intel.com/sites/default/files/resources/A_Tour_Beyond_BIOS_Using_Intel_VT-d_for_DMA_Protection.pdf.

The next portion of the title Open platforms provides a great opportunity to demonstrate a reduction to practice of these technologies, with a goal of demonstrating the design intent of the specifications in bits.

Finally, the defender's dilemma element of the title will review the relative asymmetry of platform defenders to the attackers. The cardinality of the attack presentations at this conference, namely 3 offense UEFI talks, to my 1 defense talk, brings this home. In fact, I represent one of the few defense talks hosted to be found in this conference series.

So let's get to the mapping of our three behaviors to the elements of the title. I will present in person so I get a check-mark on #1 of Being Present without much fan fare. On the topic of saying I don't know, I will not take the posture of being the omniscient guru of firmware. Instead, I want to enjoin the researchers in a dialogue, learning from them as much as I might be teaching. And I may up uttering those 3 humbling words more than I'd like. Finally, I would never claim to "own" platform security. There is a rich community of security professionals with whom I have the honor of working in the UEFI forum, open source community, and as professional colleagues. We all collaborate on providing a solution. I might lead in some venues, such as the UEFI Forum, but I am loathe to ever say I 'own' this topic area.

So that's for CSW next month.

Another application of these 3 behaviors to an X an include open source and open platforms. I've talked in the past about how thing like Intel(R) FSP can support various open source ecosystems and my excitement around Intel(R) Quark-based platforms like Galileo having open sourced their EDK II implementation. I also noted in my Intel Developer Forum 2014 talk that a book was coming. Well, the book Embedded Firmware Solutions: Development Best Practices for the Internet of Things has been published and can acquired via http://www.amazon.com/Embedded-Firmware-Solutions-Development-Practices/dp/1484200713/ or http://www.apress.com/9781484200711.



An interview with the authors was also recently posted, too http://www.se-eng.com/2015/02/authors-of-embedded-firmware-solutions-include-key-industry-architects-of-open-solutions/.

I am a believer in collaboration, too. This book adds Google and Sage to the list of companies with whom I've publicly presented and co-authored material. Examples can be found at https://www.linkedin.com/in/vzimmer and includes AMI, Cisco, Dell, HP, IBM, Insyde, Intel, McAfee, Microsoft, NICTA, Phoenix, SuSE, Toronto.

So how do the three behaviors map to this topic? The easiest to answer is 'being present.' In the earliest days of Intel FSP and this book I had the opportunity to meet my colleagues in Mt. View, San Jose, and San Francisco. In this various venues I helped forge a relationship that evolved remotely, but the pioneering engagement was face-to-face.

And on the topic of "I don't know", I have to cite the spate of libre boot emails I received internally and externally in the wake of announcements like http://www.fsf.org/news/libreboot-x200-laptop-now-fsf-certified-to-respect-your-freedom. I don't know the extent to which the various business partners can open, but I'm always open to learn about the various viewpoints and desires of the ecosystem. But I do believe in more openness and transparency, just as 'open' is in my CSW title and talk, and the book above talks about 'open' solutions.

And finally, I don't 'own' open source firmware and platforms at Intel. I am luckily to have spent the last 15+ years on a team that has been open sourcing reference implementations of industry standards and firmware. We recently posted some elements of http://firmware.intel.com/projects/minnowboard-max to http://www.tianocore.org, such as https://github.com/tianocore/edk2/tree/master/Vlv2DeviceRefCodePkg and https://github.com/tianocore/edk2/tree/master/Vlv2TbltDevicePkg. These packages, and the ability to absorb Intel FSP binaries from http://www.intel.com/fsp, along with the more granular source plus binary builds, shows progress toward more open platforms in this community.

So that's about it for the inaugural blog of 2015. I've marked a work anniversary with a blog three-years-running on this date, I discussed three behaviors, and finally, I mapped those three behaviors to two case studies.

I have been invited to co-present at the Open Compute Summit http://www.opencompute.org/community/events/summit/ocp-us-summit-2015/ next month, too. I should have conjured up a 3rd case study on this topic area of "firmware and Cloud" challenges" to have a 3-3-3 balance in the former paragraph, but work beckons and time to close up this entry.

Have a safe and happy rest of 2015 to all.





Wednesday, December 31, 2014

Regarding a prediction for 2015

Given it is the final day of 2014, I thought that my final blog of 2014 would treat the year.next which commences in a few hours, maybe with another one of my infamous TL:DR-style postings? Specifically, I'd like to build upon missive from Tim Lewis at http://uefi.blogspot.com/2014/10/security-to-eclipse-user-features-as.html wherein he shared his belief that security concerns in the platform firmware will predominate as the top user story of 2015. Given the sampling below from 2014, he may be observing an unenviable trend line.

Regarding that trend, there have been talks at several venues in 2014, such as the Black Hat (BH) talks a few months ago https://www.blackhat.com/docs/us-14/materials/us-14-Kallenberg-Extreme-Privilege-Escalation-On-Windows8-UEFI-Systems.pdf. This talk had an associated CVE http://www.kb.cert.org/vuls/id/552286 and white paper https://www.mitre.org/sites/default/files/publications/14-2221-extreme-escalation.pdf.

In addition, just this week there were a couple of talks featured on UEFI at the Chaos Communications Conference (CCC), including https://www.youtube.com/watch?v=5BrdX7VdOr0 and the associated presentation https://frab.cccv.de/system/attachments/2557/original/AttacksOnUEFI_Slides.pdf
by researchers from Bromium and Mitre, respectively.

The other CCC talk was on EFI and Thunderbolt https://www.youtube.com/watch?v=5BrdX7VdOr0. Glad to hear from the Matthew Garrett question to the presenter near the end of the talk that the option ROM vulnerability could have been mitigated if the Apple platforms implemented UEFI Secure Boot with option ROM verification (i.e., UEFI Driver Loading) enabled.

These security events and broad use of UEFI and edk II-based platforms definitely argue for the need to have additional industry coordination. This is a role that CERT has done admirably, but as Tim noted, they are now joined by the UEFI Security Response Team (USRT) http://www.uefi.org/security. This effort has been followed by a more code base-specific effort, too http://tianocore.sourceforge.net/wiki/Security. I am happy to be involved in both and although my CVSS-Fu isn't too evolved yet, I'm trying my best in writing technical advisories and doing the associated grading.

It is interesting that the references for both BH and CCC  https://www.youtube.com/watch?v=5BrdX7VdOr0 talks above cite the Intel Framework Specifications at www.intel.com and not the superseding UEFI Platform Initialization (PI) specifications http://www.uefi.org/sites/default/files/resources/PI_Spec_1.3.zip. This might contribute to some of the ambiguity seen in the boot script implementations, for example, noted in the CCC talk, since the Intel Framework specifications are frozen after having been contributed to the UEFI Forum. Maybe posting a ZIP of the PI specs and a PDF of the Framework makes the latter more search-engine friendly?

For the CCC talk https://frab.cccv.de/system/attachments/2557/original/AttacksOnUEFI_Slides.pdf, it was good to see that slide 53 mentions the work done with my Intel colleague

      [11] A Tour Beyond BIOS:
      Implementing S3 Resume with EDK2 –JiewenYao and Vincent Zimmer,
      October 2014

Jiewen and I designed features like the Lock Box protocol https://github.com/tianocore/edk2-MdeModulePkg/blob/master/Include/Protocol/LockBox.h to allow for protecting the boot script memory, via SMM or other container, back in 2009. But issues in seeing the protections deployed are compounded by the sheer difficulty in implementing S3 resume in platforms. Specifically, getting the functionality correct and having less-easily testable properties like securing the boot script has proven challenging. As a platform developer the last call you want to hear during product development is from the SQA team, saying "Everything works great, but our S3 resume testing fails once out of 10,000 times."

The above S3 document represents part of an effort to document some of the design intent on edk II source artifacts. We already have architectural intent documents such as http://www.cs.berkeley.edu/~kubitron/courses/cs194-24-S14/hand-outs/SF09_EFIS001_UEFI_PI_TCG_White_Paper.pdf (including the companion talk https://www.youtube.com/watch?v=lZ505uz1TZ4).

Regarding other defenses, in the S3 talk Corey also mentioned the "SMI Transfer Monitor" (STM). Corey's co-presenter Rafal discusses the STM in more detail at http://invisiblethingslab.com/resources/bh09dc/Attacking%20Intel%20TXT%20-%20paper.pdf. This is also mentioned in CCC 2013 talk http://events.ccc.de/congress/2013/Fahrplan/system/attachments/2266/original/Gal_Diskin_-_Virtually_Impossible_-_30C3__release_version_.pdf by former Intel researcher Gal Diskin.on slide 13. Chapter 13 of Grawrock's 2nd edition of Safe Computing http://www.amazon.com/Dynamics-Trusted-Platform-Building-Approach/dp/1934053171 also describes this feature. The gist of the STM is that it represents a usage of the peer-monitor capability in IA32, a hardware feature defined in chapter 34.15 of the Intel Software Development Manual (SDM) https://www-ssl.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html. There is a nice peer monitor overview at http://virtualizationtechnologyvt.blogspot.com/2011/07/vmx-and-smm-dual-monitor-mode.html. The use of the peer monitor, which is essentially virtualization controls in System Management Mode (SMM), allows for de-privileging today's ring 0 SMM code, such as that built responsive to the infrastructure in volume 4 of the PI 1.3 specification http://www.uefi.org/sites/default/files/resources/PI_Spec_1.3.zip. So when Corey said "where is the STM specification?", he was referring to the firmware convention for loading the STM, interaction with Intel TXT, and how to expose resource lists for which the guest SMM code can access. This class of firmware interaction is the "STM specification" and it is built upon the hardware specifications of the peer monitor virtualization capability treated in the SDM. The SDM is the bible for software-visible parts of IA32, i.e., the 'architecture.' The SDM hasn't changed over the last decade plus, whereas the STM specification has, er, evolved. 

I have spent quite a bit of time on SMM over the last decade plus, from having defined the Framework SMM CIS http://www.intel.com/content/www/us/en/processors/itanium/efi-smm-cis-v09.html infrastructure http://www.google.com/patents/US6848046, from which the present PI 1.3 SMM design has been derived, to collaborating on peer monitor and STM work. I'm a big fan of isolation technologies and trusted computing, but I'll have to pause here for this 2014 entry on this topic. If I were a smarter guy I would follow in the foot-steps of Fermat's Last Theorem and claim to have the final proof of solving the SMM security issues but excuse myself for today by noting that the answer is "too large to fit in the margin" of this blog http://en.wikipedia.org/wiki/Fermat%27s_Last_Theorem.

Just as a document cannot replace well commented codes, having more executable methods for assurance are always preferred. These include efforts such as the CHIPSEC work https://github.com/chipsec/chipsec which I also describe in http://www.uefi.org/sites/default/files/resources/2014_UEFI_Plugfest_04_Intel.pdf and https://www.youtube.com/watch?v=aV1DSF4cwGw. These tests are run after boot and provide an a posteriori view of the platform.

More recent technology includes having security testability in-situ with the platform, versus a CHIPSEC style post-boot test, and reporting the results. This type of test and reporting capability was mentioned in 2013 at http://www.uefi.org/sites/default/files/resources/UEFI_Summerfest_2013_-_Microsoft_Hardware_Security_Test_Interface.pdf and now has a public specification realization at  http://msdn.microsoft.com/en-us/library/windows/hardware/dn879006.aspx (HSTI) This work bridges the semantic gap historically faced by platform builders wherein the various system requirements in a Windows Hardware Certification document, such as http://download.microsoft.com/download/7/0/E/70E74967-B0FE-477A-974F-C1ED16EE31DF/windows8-1-hardware-cert-requirements-system.pdf, can now have a companion reporting channel. Examples include injunctions in System.Fundamentals.Firmware.UEFILegacyFallback, such as

"An OEM may not ship a 64 bit system which defaults to legacy BIOS or loads legacy option ROMs if that system ships with a UEFI-compatible OS. When Secure Boot is Enabled, Compatibility Support Modules (CSM) must NOT be loaded."
These Compatibility Support Module (CSM) behaviors are something that only the platform implementation can deduce and are difficult to detect via a later test, although heuristics like scanning 0xC0000p through 0x100000p in the address space 'could' be done.

The HSTI interface builds upon the Adapter Interface Protocol (AIP) class of structure defined in the UEFI 2.4 specification http://www.uefi.org/sites/default/files/resources/2_4_Errata_A.pdf. Since AIP producers are boot service only, a pre-OS agent needs to query the HSTI interface in order to cull the settings and convey the results into the operating system run time, if needed, in a vendor-specific fashion.

Related work to HSTI that goes beyond mapping to Windows requirements include the ability to report BIOS Integrity Attributes, as described in http://csrc.nist.gov/publications/drafts/800-155/draft-SP800-155_Dec2011.pdf in 3.2.1.1. And in order to surface this information, we defined in http://www.trustedcomputinggroup.org/files/static_page_files/D4268663-1A4B-B294-D05DE87EE90558B6/TCG_EFI_Platform_1_22_Final_-v15.pdf the following:

    typedef struct {
       UINT32 VendorId;
       EFI_GUID ReferenceManifestGuid;
    } TCG_Sp800-155-PlatformId_EventStruct

This structure can be used to reference an off-machine Reference Manifest (RM). The idea is that the GUID in the structure above would be specific to a vendor, model, and firmware instance in a XML-based manifest document on the platform suppliers website. The schemas are defined in http://www.trustedcomputinggroup.org/files/resource_files/73638609-1A4B-B294-D0902CC2A13C8697/Reference_Manifest_Schema_Specification_v2.0.r5.pdf, so now it's a set of work items for the industry to map the RM's to platform attributes, such as mentioned in 155.

Who knows, at some point maybe these reporting and testing efforts will all align?

Well, if you have gotten this far, the 'Didn't Read" portion of "Too Long, Didn't Read" (TL;DR) hasn't been the case for you. I'm not sure whether to reward you for your stoicism or not for wading through this entry.

To summarize, 2014 has shows a spate of security-related activities, both by the attackers (BH, CCC) and the defenders (USRT). The firmware-producing and consuming community is acutely aware of assurance concerns and new testing methodologies have been deployed in '14 and are coming in '15, too, including HSTI. I don't necessarily subscribe to the 'Spy versus Spy' aspect of security, or fall into existential angst that the "Defenders Dilemma" is not solvable. Instead, I see many parties passionate about having robust, usable systems and collaboration on art to achieve those goals. Open source, open documentation, open specifications, open platforms,.... All help in the cause.

And if you're still working these last hours of today, pause and have a coffee.
Also, enjoy a happy and safe new year.

Cheers,

V.Z.兹梅

Saturday, December 20, 2014

"So Long, and Thanks for All the Fish"

Yesterday my last day in DuPont after nearly 18 years, 15 of those in the same cube, here at this WA Intel site. Off to work at the Seattle office in early '15. So long, DuPont, and thanks for the memories. And all of the Fish, although in this case 'Andrew Fish.' Although Fish doesn't work at Intel any longer, the inventor of the "Intel Boot Initiative" (IBI), which became EFI/UEFI, still lives in the South Puget Sound. We broke bread for the final time at our favorite local restaurant.


This is the "R&R" mentioned in the acknowledgements section of the 2nd edition of Beyond BIOS http://www.amazon.com/Beyond-BIOS-Developing-Extensible-Interface/dp/1934053295/, "Also many of this team will recall over ten years of "design discussions" at R&R." I captured Fish on the left and Mark Doran http://newsroom.intel.com/community/intel_newsroom/bios?n=Mark%20S.%20Doran&f=searchAll on the right eating our final Teriyaki bowls. As always, good conversations on firmware and technology. And the picture is also epic in that the duo often introduces itself as "Andrew Fish who invented EFI, and Mark Doran who delivered it to the industry."  Mike Kinney & I held down the other side of the table. I've learned quite a bit working with all three of these colleagues over these many years.

During my final days at Compaq in late 1996 I talked to Intel about joining, and my options were "Join Portland for Xeon, or DuPont for Merced." I was inspired by the thought of joining the 64-bit revolution, so there was no doubt in my mind as to which locale to choose.  Also, having grown up in Texas, the Pacific Northwest was a large unknown, so the distinction between OR and WA didn't even factor into my decision.

And my whole tenure at Intel in DuPont since February 1997 has been boot firmware.  I began with a PC/AT BIOS underneath the Merced System Abstraction Layer (SAL), with the original OS loader interface of SAL_PROC (0x13), as a 64-bit mapping of BIOS 13h.  Same for video mapping of SAL_PROC (0x10), keyboard of SAL_PROC (0x13), etc. The OS community wasn't amused.

As the OS interface evolved to C-based IBI, then EFI, the underlying boot infrastructure changed. I moved from driving some of the SAL-on-BIOS for server (aka "FrankenBIOS"), to the short-lived Workstation Product Division (WPD) where we evolved a C-based boot solution. The latter pioneered art such as the Furball and interposer, which were the predecessor of the Intel Framework Compatibility Support Module (CSM) and CSM16 binary.  We called the former 'furball' because it was something we imagined a native 32-bit (IA32) and 64-bit (Itanium) firmware solution would eventually 'cough up', with a less than pleasant imagery derived from the world of cats.

In 1999 we had evolved the workstation firmware to binary modules called "Plug-In Modules", or PIM's. I recall a fateful meeting with the lead on that effort and my colleague visiting from OR. The conversation went something like 'And we can also put the PIM's into option ROMs, too.' At that point I realized the trajectory was ill-fated since the problem with open platforms and option ROM's isn't factoring code to run in that storage container so much as 'how' to interoperate with the system firmware, namely what API's to expose, where to define them, and how to evolve this art. And to that end, I realized that EFI would win as it was the only man standing to solve this problem.

Specifically, EFI nailed down the interface methodology to the OS loader and option ROM community where the broad interoperability was needed.  Moving the underlying initialization firmware to a new methodology, such as what became Intel Framework and then UEFI PI was valuable, but not the necessary first step.  The first step was to lay the foundation for broad interop in order to have time for the top-level OS and IHV ecosystem to start moving their dependent infrastructure.

At that point in my career when I had that realization, I was lucky enough to have a friend and Intel colleague like Andrew Fish who suggested I have lunch with Mark Doran.  Afterward I on-boarded to the EFI team in 1999 and the rest has been a great 15 run on helping evolve EFI into UEFI, EFI-on-BIOS into Framework and then UEFI PI, and the open source offering from "EFI Sample" to EDK to today's EDK II.  Since then a lot of code and specifications have ensued



with hopefully more to come in 2015+.  Not sure if there is another 15 years into the run.  Although one co-developer of Tiano, the code-name for the underlying Framework (and now PI work) quipped a few years ago "We said Tiano was the '20 year' BIOS replacement solution, so when did you start counting?"

Speaking of 2015+, I had better get back to work if I want to get a head start on the next way of the firmware revolution started in South Puget Sound, WA.

Cheers




Monday, November 17, 2014

Porting to a new architecture

Part of the excitement of working with system firmware includes programming on bare metal. I recall taking an NT Driver class back in 1998 led by some Ex-DEC engineers. The engineer said "programming kernel mode drivers is tricky, but the real magic entails the work of the firmware guys." As an embedded guy working in this area since 1992, all I could say is 'Yes.'

The news about the RISC-V http://riscv.org/ port of coreboot http://review.coreboot.org/#/c/7065/ reminded me of some of the thrills in porting firmware to a new CPU architecture. A possible UEFI port for RISC-V is even mentioned during the technical discussion of this new instruction set architecture https://www.youtube.com/watch?v=vB0FC1DZqUM&feature=youtu.be.

Some of my favorite work includes bring-up for EFI on new CPU's. We started the EFI journey in 1998 working on Itanium and IA32. The Itanium port built upon SAL-A/B as the PI equivalent code, such as memory and CPU initialization http://www.amazon.com/IA-64-Linux-Kernel-Design-Implementation/dp/0130610143.  Simarly, for IA32 we originally booted upon a PC/AT BIOS using techniques like DUET https://github.com/tianocore/edk2/tree/master/DuetPkg.

Over time we moved to native code for the platform initialization as the Framework specifications evolved. These Framework specifications became the UEFI Platform Initialization (PI) specifications, and the code base evolved from EDK http://tianocore.sourceforge.net/wiki/EDK to EDKII http://tianocore.sourceforge.net/wiki/EDK2.

In those early 2000's some fun path-finding was a port to XScale http://en.wikipedia.org/wiki/XScale. I mention that work a bit in the above article and also discuss the port in chapter 7 of  the first edition of Beyond BIOS http://www.amazon.com/Beyond-BIOS-Implementing-Extensible-Interface/dp/0974364908 since Intel was still delivering XScale-based products, although EFI wasn't an official requirement. Instead, I used the XScale port to show the cross-architecture flexibility and scaling of both the specifications and the associated code bases. In the second edition http://www.amazon.com/Beyond-BIOS-Developing-Extensible-Interface/dp/1934053295/, I removed that content and replaced it with Intel IA32 SOC examples.

Ironic to think that I was possibly the first person to do an EFI port to 32-bit ARM, albeit EDK-based and it had a faked-PEI but full DXE.

After that the next excitement occurred with Intel64/EM64T/AMD64/X86_64, or as is now known in the UEFI binding, x64.  See chapter 2 of the UEFI2.4 specification at www.uefi.org. There the challenge was having to enable paging. Itanium also needed paging but we used software TLB handlers and had simple logic to program the TR registers in our SAL, then DXE CPU driver. For x64, we kept PEI to 32-bit since page tables in ROM and / or temporary RAM were tricky and ported DXE, our EFI/UEFI core, to 64-bits.

The crafting of .s/.asm files for a new architecture and getting through the first boot is more exciting than a platform port within a given architecture since there is a sense of pioneering with these foundation components.

Since this pioneering, the ARM community has done the EDKII ports to ARM32 and Aarch64 and they are first class citizens in the standards, including UEFI & PI, and the codebase, such as EDKII.

And although there isn't an official MIPS UEFI binding, there is a port to MIPS 32 at http://sourceforge.net/projects/efi-mips/.

I look forward to seeing more ports to UEFI, including the presently non-UEFI Power8 firmware such as https://github.com/open-power/skiboot.

Like the RISC-V work and ARM ports, I'll have to watch the latter efforts from the sidelines. My day job and extra-credit/after hours budget have enough Intel-architecture based efforts and opportunities to pursue.  Although I have to admit I miss some of the excitement of the port to ISA.Next.